Then a new device which is named Inter-line Dynamic Voltage Restorer (IDVR) is discussed. This device consists of two conventional DVRs which are installed. An interline dynamic voltage restorer (IDVR) is a novel c o m p e n s a t i o n piece of mitigation It is made of several dynamic voltage restorers (DVRs) with a. Index Terms—Dynamic voltage restorer, Interline dynamic voltage restorer, Current source inverter, SMES and Power quality.
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Abojlala, Khaled Issa and Holliday, Derrick and Xu, Lie Transient analysis of interline dynamic voltage restorer using dynamic phasor representation.
Interline dynamic voltage restorer (IDVR) Archives – ASOKA TECHNOLOGIES
The results from both the simulation and experimental tests illustrate that the proposed technique clearly achieved superior performance. This paper proposes a new operational mode for the IDVR to improve the DF of different feeders under normal operation.
Further extension in compensation time can be achieved for intermediate sag depths. With this technique, none or less of the real power will be transferred to the system, which provides more for the DVR to cover a wider range of restoorer sags, adding more flexible adaptive control to the solution of sag voltage disturbances.
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When the compensation was conducted using the proposed technique, less energy was used for the converter basic switching process.
Then, experimental results on a scaled-down IDVR are presented to confirm the theoretical and simulation results. Per-phase experimental and corresponding simulation results for DF improvement case: For normal voltage levels, the DVRs should be bypassed. In this technique, the source voltages are sensed continuously and when the voltage sag is detected, the shunt reactances are switched into the circuit and decrease the load power factors to improve IDVR performance.
Both the magnitude and phase displacement angle of the synthesized DVR voltage are precisely adjusted to achieve lower power utilization. The existing control strategies either mitigate the phase jump or improve the utilization of dc link energy by i reducing the amplitude of injected voltage, or ii optimizing the dc bus energy support.
To overcome this limitation, a new idea is presented in this paper which allows to reduce the load power factor under sag condition, and therefore, the compensation capacity is increased.
An IDVR merely consists of several dynamic voltage restorers DVRs sharing a common dc link connecting independent feeders to secure electric power to critical loads. Winter Meetingvol. Finally, the simulation and practical results on the CHB based IDVR confirmed the effectiveness of the proposed configuration and control scheme. It also increases compensation time by operating in minimum active power mode through a controlled transition once the phase jump is compensated.
Journal of Engineering Research and Technology
Computer planning and simulation of power systems require system components to be represented mathematically. The experimental results demonstrate the feasibility of the proposed phase jump compensation method for practical applications.
The performance of restoer method is evaluated using simulation study. In this paper, an enhanced sag compensation strategy is proposed that mitigates the phase jump in the load voltage while improving the overall sag compensation time.
These advantages were achieved by decreasing the load power factor during sag condition. This enhancement can also be seen as dynamci considerable reduction in dc link capacitor size for new installation.
In this paper an enhanced sag compensation scheme is proposed for capacitor supported DVR. The experimental test results match those proposed using simulation, although some discrepancies due to the imperfect nature of the test circuit components were seen.
The overall three-phase voltage signals during in-phase compensation simulation.
The compensation was eventually forced to stop before the entire voltage sag period was finished. In this case, the DF of the sourcing feeder will have a notable improvement with only a slight variation in DF of the receiving feeder.
To illustrate the effectiveness of the proposed method an analytical comparison is carried out with the existing phase jump compensation schemes. During sag period, active power can be transferred from a feeder to another one and voltage sags with long durations can be mitigated. DF improvement can be achieved via active and reactive power exchange PQ sharing between different feeders. This study aims to enhance the abilities of DVRs to maintain acceptable voltages and last longer during compensation.
The proposed concept has been supported with simulation and experimental results. Mathematical analysis is carried out for each individual component of the IDVR as modular models, which are then aggregated to generate the final model.
Electronics Nuclear engineering, Electrical and Electronic Engineering. This technique results in less energy being taken out of the DC-link capacitor, resulting in smaller size requirements. The DF of the sourcing feeder increases while the DF of the receiving feeder decreases. Single line diagram of an IPFC in transmission system.
The real and reactive powers are calculated in real time in the tracking loop to achieve better conditions. The proposed technique has the advantage of simplifying the modelling of any flexible AC transmission system FACTS device in dynamic phasor mode when compared to other modelling techniques reported in the literature. In this mode, theDFof one of the feeders is improved via active and reactive power exchange PQ sharing between feeders through the common dc link.
The higher active power requirement associated with voltage phase jump compensation has caused a substantial rise in size and cost of dc link energy storage system of DVR. IDVR compensation capacity, however, depends greatly on the load power factor and a higher load power factor causes lower performance of IDVR. These operational constraints have been identified and considered. This technical merit demonstrates that DVRs could cover a wider range of voltage sags; the practicality of this idea for better utilization is better than that of existing installed DVRs.
The main conclusions of this work can be summarized as follows: The ensure compatibility with transient stability programs, the analysis is performed for the fundamental frequency only, with other frequency components being truncated and without considering harmonics.
Strathprints home Open Access Login. This paper presents a utilization technique for enhancing the capabilities of dynamic voltage restorers DVRs. The proposed strategy improves the voltage quality of sensitive loads by protecting them against the grid voltage sags involving the phase jump. Per-phase PQ sharing mode simulation results: A method for building a dynamic phasor model of an Interline Dynamic Voltage Restorer IDVR is presented, and the resulting model is tested in a simple radial distribution system.
This paper deals with improving the voltage quality of sensitive loads from voltage sags using dynamic voltage restorer DVR.